• FREE DOWNLOAD of a basic 8-state turbo code design and simulation tool, Turbo8 (including example DRP interleavers)
  
•  Turbo interleaving techniques that drive down flares in the performance curve:
  
  • Flares below 10^-4 (PER) and 10^-6 (BER) for 4-state codes
  • Flares below 10^-6 (PER) and 10^-8 (BER) for 8-state codes
  • Flares below 10^-8 (PER) and 10^-10 (BER) for 16-state codes
• 4-state partially-systematic turbo codes (PSTCs) that perform very close to binary capacity
  • r=1/2: 0.26 dB from binary capacity (closer for higher code rates)
• 16-state turbo decoding at greater than 2 Mbps (8 fixed iterations) on your PC
• Viterbi decoding at greater than 9 Mbps (K=7) on your PC
  
• Efficient and flexible vector SISO decoder for linear block codes
  
  • Achieves maximum-likelihood (ML) performance in numerous cases
  • Attractive constituent decoder for Turbo product codes (a.k.a. block Turbo codes)
    
  • Hyper codes and Skew codes
    

This site documents forward error correction (FEC) techniques and products developed by the Communications and Signal Processing group (RCSP) at the Communications Research Centre (CRC) Canada.

A variety of pages describing the research and development activities of the group may be accessed with the sidebar on the left. There is information on both mature technology (e.g., turbo code implementations) as well as on active areas of research (e.g., interleavers for Turbo codes, soft decoding for block codes). A publication archive is also included that reflects the work of the group in FEC, multiuser detection, modulation, and synchronization.