The digital ASIC/PLD (Application Specific Integrated Circuit / Programmable Logic Device) design and test facility is equipped with HP and Sun Workstations running Mentor Graphics CAD tools for schematic entry, simulation, synthesis, layout and electrical and design rule verification. In addition CAD tools are available for the design of Altera, Actel, AT&T, and Xilinx FPGAs. The testing of the digital ASICs and FPGAs is carried out on an XL100 128 I/O IMS tester operating in conjunction with logic analizers.

Further Information:

Valek Szwarc
Manager, Integrated Electronics
Tel: (613) 998-2089
Fax: (613) 990-8369
E-mail: valek.szwarc@crc.gc.ca